In a typical computer system, a processor interfaces with a plurality of peripheral devices on one or more expansion buses. An expansion bus is an electrical pathway used to interconnect a computer motherboard and peripheral devices. There are many different types of expansion buses, and the specific architecture of an expansion bus is dependent upon the specific computer system being implemented. However, several bus architecture standards have been developed that have allowed the designers of peripheral interface devices to design products that are compatible with the bus rather than being limited to a single computer system. Examples of bus architectures include the Industry Standard Architecture ("ISA") and the Extended Industry Standard Architecture ("EISA"). Intel Corporation defined an expansion bus architecture that is optimized for fast data transfers and is itself readily expandable, the Peripheral Component Interface ("PCI") Local Bus. The PCI Local Bus standard is presently maintained by a consortium, the PCI Special Interest Group ("PCI SIG").
The PCI bus specification provides for a finite number of devices that may be simultaneously interfaced to a single implementation of a PCI bus. Although the PCI Local Bus specification, (version 2.1, Jun. 1, 1995), logically supports 32 physical PCI device packages, a typical PCI bus implementation supports ten electrical loads (five connectors and five devices interfaced via the connectors). However, it is frequently considered desirable to interface more than five devices attached via connectors in a computer system. Moreover, there are numerous peripheral devices that were designed for operation with previous bus architectures, such as ISA or EISA. Although many peripheral interconnect devices have been redesigned to take advantage of the benefits of the PCI bus, a large number of have not. In order to allow for larger PCI buses and/or interfacing with devices configured for other bus architectures, a system by which a PCI bus can be expanded to include additional PCI buses and/or non-PCI buses has been developed using expander bridges. Expander bridges are not limited to just PCI buses, and have been developed for use with other bus architectures, as well as to interconnect heterogenous buses, such as a PCI to ISA.
A typical prior art PCI expander bridge is a device positioned on a PCI bus that allows additional PCI buses to be interconnected with the PCI bus on which the PCI expander bridge is installed. In prir art systems, a next PCI expander bridge could be positioned on the expansion bus, downstream from the preceding PCI expander bridge, effectively multiplying the capaci of the PCI bus by the number of expander bridges interconnected on the PCI bus.
In a computer system that in ludes a master bus controller device coordinating bus activities with the processor bus, such as, for example, the Memory and Input/Output Bridge Controller developed by Intel Corporation as part of the 82450NX chipset, the PCI expander bridges may be config ed in parallel rather than in a hierarchical series configuration.
In addition to providing additional expansion slots for peripheral devices, expansion buses also advantageously separate potentially incompatible devices from each other when the devices are installed in separate expansion buses as well as limiting the number of devices a malfunctioning device will be sharing a common bus with. When a device stops functioning correctly, that device may lock up the bus to which it is connected by preventing any other devices on the bus from accessing the bus, effectively disabling all other devices connected to that bus as well. A device may malfunction for any number of reasons, including, for example, an intermittent or non-recurring error caused by interaction with another device on the bus or a "soft" error caused by software or a specific sequence of events. When an expansion bus ceases to operate correctly because of one of these kinds of errors, the problem can often corrected by returning the bus and the devices connected thereon to an initialization or reset state, without requiring replacement of the malfunctioning device or device.
In prior art systems, however, this is typically accomplished by resetting the entire system. Unfortunately, this disadvantageously requires disruption of all operations in the system, including operations of devices that are separate and distinct from the expansion bus upon which the problem is occurring and which may be able to continue operation without the devices on the expansion bus experiencing problems. Moreover, if the system is a network server, then an entire network of computer systems may be disabled and require reset operations when the network server is reset. A readily isolated and relatively soluble problem could possibly bring down an entire network.
Based on the foregoing, there is a need for independently resettable expander bridges that allow an expander bridge (and the expansion buses associated therewith) to be reset without requiring a reset of the host system.